High Level Design (HLD)

The split of design challenges in HLD: (initial)
– PCIe area (two slot vs 4 slot)
– size of the board (nano vs mini)
– SoC area, backplane layout (CPU, RAM, 1Gb, rear ports…)
– GPU slot
– Audio
– Industrial IO, headers on board and custom expansions area

…to be continued…

Block diagrams:

Bill of Materials (preliminary):

%d bloggers like this: